Jiwoo Hong
I'm an M.S. student in the School of Electrical Engineering at KAIST, where I'm advised by Prof. Minsoo Rhu in the VIA (Vertically Integrated Architecture) Research Group.
Before KAIST, I received my B.S. in Computer Science and Mathematics (double major) from Yonsei University. I worked as a research intern at the Yonsei Scalable System Software Lab, advised by Prof. Jinkyu Jeong.
If you are interested in my research, feel free to reach out by email.
News
- 2026.09 Starting my M.S. at KAIST, joining the VIA Research Group advised by Prof. Minsoo Rhu.
- 2025.11 Started as a Software Engineer Intern at Moloco, building cloud-native backend infrastructure.
- 2025.08 Graduated from Yonsei University with a double major in Computer Science and Mathematics.
- 2025.07 Started as an Assistant Researcher at Hanwha Aerospace (intern, converted to full-time in Sep), working on C++ software development.
- 2024.03 Started as a research intern at the Yonsei Scalable System Software Lab, advised by Prof. Jinkyu Jeong.
- 2020.03 Enrolled at Yonsei University.
Research
My research goal is to make storage a first-class tier of the GPU memory hierarchy, so that ML workloads are limited by how much data they need, not by how much fits in GPU memory. As model parameters, KV caches, and training datasets outgrow GPU memory, a growing share of time and cost goes to moving data rather than computing on it. In conventional systems, this data path is orchestrated by the CPU, adding latency and software overhead that even massive GPU parallelism cannot hide.
- GPU-Centric Storage Access: How can GPUs access SSDs directly and at fine granularity, taking the CPU off the critical path?
- Storage as a Memory Tier for ML: For which workloads does extending GPU memory with SSDs pay off, and where does it break down?